Semiconductor Engineering

Automate Memory Test Through A Shared Bus Interface

The use of memory-heavy IP in SoCs for automotive, artificial intelligence (AI), and processor applications is steadily increasing. However, these memory-heavy IP often have only a single access point ...
Nasdaq

Advantest Unveils T5801 Ultra-High-Speed Memory Test System to Power Next-Generation DRAM Devices

TOKYO, Feb. 12, 2025 (GLOBE NEWSWIRE) -- Leading semiconductor test equipment supplier Advantest Corporation (TSE: 6857) today announced the T5801 Ultra-High-Speed DRAM Test System. The cutting-edge ...
Electronic Design

When AI Meets HBM: Memory Test for the Terabit Era

As AI systems push HBM into terabit-per-second territory, memory test strategy is becoming a core part of system design. As AI’s appetite for data grows, and more complex memory architectures follow, ...
Semiconductor Engineering

New Error Correcting Code And Non-Volatile Memory Options For Memory BIST

Tessent MemoryBIST from Siemens EDA provides a complete solution for at-speed test, diagnosis, repair, debug and characterization of embedded memories. Leveraging a flexible hierarchical architecture, ...