IEEE

An Efficient Technique to Implement the Multi-Valued Logic Gates using Nano-FETs

Abstract: In this study, carbon nanotube field-effect transistors (CNTFETs) are presented as the basis for energy-efficient multiple-valued logic (MVL) circuits. Leveraging CNTFET unique properties ...
Interesting Engineering

‘World’s first’: IBM packs 100 billion transistors into a fingernail-sized sub-1 nm chip

IBM unveils a 0.7 nm chip with 100 billion transistors, introducing nanostack architecture for advanced computing.

IBM Unveils World’s First Sub-1nm Chip With 100 Billion 3D-Stacked Transistors

IBM just unveiled the world's first sub 1-nanometer chip: 100 billion transistors. IBM also says they've produced functioning ...
The Next Web

IBM says it has built the first sub-1nm chip technology

IBM unveiled a 0.7nm chip built on a new 3D ‘nanostack’ architecture, packing nearly 100 billion transistors onto a fingernail-sized chip.
MIT Technology Review

IBM has unveiled chip technology that could help extend Moore’s Law another decade

The company, along with others, is pursuing a new paradigm for cramming more transistors on chips—building up.
Semiconductor Engineering

More Massive Still: Why AI Infrastructure Demands A Unified Design Approach

At the recent Data Center World 2026 in Washington, D.C., one message came through louder than ever: AI infrastructure is ...